[Libre-soc-isa] [Bug 794] SVP64 REMAP for utf8

[bugzilla-daemon at libre-soc.org]

https://bugs.libre-soc.org/show_bug.cgi?id=794

--- Comment #26 from Luke Kenneth Casson Leighton <lkcl at lkcl.net> ---
(In reply to Jacob Lifshay from comment #23)

> I didn't see how to get the svshape instruction to set offset...

it can't.  although i may have worked out a way to do it, by using these
SVRM modes https://libre-soc.org/openpower/sv/remap/

    0b1000      reserved
    0b1001      reserved

it would mean sacrificing 3 out of 3D (when setting offset) i.e. only being
able to do 1 or 2D REMAP, because 

    svshape SVxd,SVyd,SVzd,SVRM,vf

* SVxd would be interpreted as the offset
* SVyd as an rmm (see svindex instruction)
* SVzd as-is (the dimension)

so by sort-of combining what's already been done in svindex with svshape
it *should* be possible.

> Also, the algorithm constantly needs to switch between several offsets,
> making a dedicated mode desirable.

interesting.  ok so that also means having the "nonpersist" mode is
also a priority, and being able to set up several SVSHAPEs simultaneously.
ok this is all doable.

(In reply to Jacob Lifshay from comment #24)

>     raise Exception("opcode %s of '%s' not supported" %
> Exception: opcode andi of 'sv.andi. *80, *47, 15' not supported

oink.

--- a/src/openpower/sv/trans/svp64.py
+++ b/src/openpower/sv/trans/svp64.py
@@ -1535,6 +1535,9 @@ if __name__ == '__main__':
         'fmvis 5,64',
         'fmvis 5,32768',
     ]
+    lst = [
+        'sv.and. *80, *80, 1',
+    ]
     isa = SVP64Asm(lst, macros=macros)
     log("list", list(isa))
     asm_process()

sv.and is detected/supported but sv.andi is not.  moo?
i bet that's just entirely missing from the RM*.csv files
i.e. missing entirely from sv_analysis.py as a recognised
pattern.

../openpower/isatables/RM-2P-1S1D.csv:andi.,NORMAL,,2P,EXTRA3,
                        d:RA;d:CR0,s:RS,0,0,RS,0,0,RA,0,CR0,0

oink.  noo, it's there - that's even weirder.

leave it with me.

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