[Libre-soc-isa] [Bug 908] New: indexed remap needs defined behavior for out-of-bounds indexes

bugzilla-daemon at libre-soc.org bugzilla-daemon at libre-soc.org
Sun Aug 14 23:17:19 BST 2022


https://bugs.libre-soc.org/show_bug.cgi?id=908

            Bug ID: 908
           Summary: indexed remap needs defined behavior for out-of-bounds
                    indexes
           Product: Libre-SOC's first SoC
           Version: unspecified
          Hardware: Other
                OS: Linux
            Status: CONFIRMED
          Severity: major
          Priority: ---
         Component: Specification
          Assignee: lkcl at lkcl.net
          Reporter: programmerjake at gmail.com
                CC: libre-soc-isa at lists.libre-soc.org
   NLnet milestone: ---

we need indexed move to have *defined* behavior, imho out-of-bounds being
undefined behavior is unacceptable:
https://git.libre-soc.org/?p=libreriscv.git;a=blob;f=openpower/sv/remap.mdwn;h=f553aaf2e219a8d0851870b30e443b1d517d0d22;hb=HEAD#l194
> Additionally,
> no register used as an Index may exceed MAXVL.
> 
> Failure to observe
> these conditions results in `UNDEFINED` behaviour.

Also, for consistency, we need the check to be against VL, not MAXVL.

I suggest all out-of-bound writes are ignored, and all out-of-bound reads give
zero.
This matches with the dynamic shuffle instruction in wasm ("i8x16.swizzle"),
which has the read byte be dynamically selected, so it only depends on
out-of-bound reads being zero:
https://webassembly.github.io/spec/core/exec/instructions.html#mathsf-i8x16-xref-syntax-instructions-syntax-instr-vec-mathsf-swizzle

Alternative suggestions could be to trap on out of bound writes with zeros on
reads (also matches wasm since wasm only uses dynamic read indexes for
registers), or to trap on all out-of-bounds accesses (terrible for wasm
performance).

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