[Libre-soc-isa] [Bug 817] Big Integer Math (sv.adde, sv.subfe, sv.madded, 128 by 64-bit -> 64-bit div/rem, maybe more...)

[bugzilla-daemon at libre-soc.org]

https://bugs.libre-soc.org/show_bug.cgi?id=817

--- Comment #23 from Jacob Lifshay <programmerjake at gmail.com> ---
(In reply to Luke Kenneth Casson Leighton from comment #20)
> ok i updated the analysis page, 

> `divrem2du RT,RA,RB,RC`
>
>      divisor = (RC) || (RB)
>      dividend = EXTZ128(RA)
>      RT = UDIV(dividend, divisor)
>      RS = UREM(dividend, divisor)
>
> Again, in an SVP64 context, using EXTRA mode bit 8 allows for
> selecting whether `RS=RC` or
> `RS=RT+VL`.

looks good!

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