[Libre-soc-isa] [Bug 817] Big Integer Math (sv.adde, sv.subfe, sv.madded, 128 by 64-bit -> 64-bit div/rem, maybe more...)

[bugzilla-daemon at libre-soc.org]

https://bugs.libre-soc.org/show_bug.cgi?id=817

--- Comment #20 from Luke Kenneth Casson Leighton <lkcl at lkcl.net> ---
ok i updated the analysis page, no conditional "if RT != 0"
because i realised, if going to do that, might as well
use X-Form RT,RA,RB with implied RS=RA+VL and
do dividend = (RA) || (RS) and have divqd modqd for 128/64

that reduces pressure on EXT04.

now, question is, does signed-div make any sense? it didn't
in big-mul because a corrective factor can be done after.

-- 
You are receiving this mail because:
You are on the CC list for the bug.