[Libre-soc-isa] [Bug 794] SVP64 REMAP for utf8

[bugzilla-daemon at libre-soc.org]

https://bugs.libre-soc.org/show_bug.cgi?id=794

--- Comment #11 from Luke Kenneth Casson Leighton <lkcl at lkcl.net> ---
there is a hardware design concept i would like to consider here, it is
an advancement of the Eth Zurich Snitch core
https://arxiv.org/pdf/2002.10143

specifically the idea of putting an intercept in to register usage which
instead connects to a synchronous FIFO.

reading or writing the FIFO would be wired to an advancement of svstep.

if also connected to Memory LDST just like in Snitch but also Data Dependent
failfirst and REMAP then there is the possibility to cover strange
algorithms like UTF8 and JSON parsing

i had a think, i see the value of identifying starting points and end points,
creating a DOM from a sequential stream, that is BIG.

could even be used for Message Passing between processors or processes.
must look at design of OpenCAPI properly.

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