[Libre-soc-isa] [Bug 697] New: SVP64 Reduce Modes
bugzilla-daemon at libre-soc.org
bugzilla-daemon at libre-soc.org
Thu Sep 16 18:32:27 BST 2021
https://bugs.libre-soc.org/show_bug.cgi?id=697
Bug ID: 697
Summary: SVP64 Reduce Modes
Product: Libre-SOC's first SoC
Version: unspecified
Hardware: Other
OS: Linux
Status: CONFIRMED
Severity: enhancement
Priority: ---
Component: Specification
Assignee: lkcl at lkcl.net
Reporter: lkcl at lkcl.net
CC: libre-soc-isa at lists.libre-soc.org
NLnet milestone: ---
several different types of Reduce Modes need to be defined and written up
* Scalar
* Tree-reduction
* Sub-Vector Horizontal
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