[Libre-soc-isa] [Bug 615] talk to binutils and gcc developers about acceptable sv assembly format

[bugzilla-daemon at libre-soc.org]

https://bugs.libre-soc.org/show_bug.cgi?id=615

--- Comment #15 from Luke Kenneth Casson Leighton <lkcl at lkcl.net> ---
(In reply to Jacob Lifshay from comment #14)

> > have gcc create the svp64 prefix as a new 32 bit "fake" instruction which
> > binutils picks up and outputs with an EXT01 Primary Opcode.
> 
> That could definitely work -- Arm does something kinda like that with their
> Thumb-mode IT instruction which sets up a predicate to conditionally execute
> the next 1-4 instructions.

ahh iiinteresting! there is a keyword "parallel" in the macro language which
associates groups of other macros, typically predicates.

cntlz simple pattern

https://gcc.gnu.org/git/?p=gcc.git;a=blob;f=gcc/config/rs6000/rs6000.md;h=c0d7b1aff96801acea581c026c06c9be0b4a8cbd;hb=7b900dca607dceaae2db372365f682a4979c7826#l2379

there are attributes "predicable" and "multiple"

https://gcc.gnu.org/git/?p=gcc.git;a=blob;f=gcc/config/arm/thumb2.md;h=5772f4d0b76d23b48804f1dead36734a4ebc82e5;hb=7b900dca607dceaae2db372365f682a4979c7826#l159

then... urk.  i started looking through the arm11 md file, no joy finding
anything obvious.

-- 
You are receiving this mail because:
You are on the CC list for the bug.