[Libre-soc-isa] [Bug 650] write rfc for OpenPower fpr <-> gpr moves/conversions
bugzilla-daemon at libre-soc.org
bugzilla-daemon at libre-soc.org
Thu Jun 3 20:56:49 BST 2021
https://bugs.libre-soc.org/show_bug.cgi?id=650
--- Comment #12 from Jacob Lifshay <programmerjake at gmail.com> ---
(In reply to Luke Kenneth Casson Leighton from comment #11)
> (In reply to Jacob Lifshay from comment #10)
> > fix formatting: luke you had mistakenly unindented the list of reasons to
> > have each FP -> Int conversion mode, I reindented those so they are
> > correctly grouped under the appropriate list entry.
>
> hmm, i did that because it wasn't clear, because of the spaces in between.
Well, it's perfectly clear to me in the rendered markdown (which is the part we
should care about). The blank lines are just so it doesn't get all crammed onto
one line when rendered.
> this would indicate that some descriptive text or headings, or other
> reorganisation might be in order.
>
> > Also:
> > commit bb9a2dcc50b656e07accaf1036edb3607ea82f6c (HEAD -> master,
> > origin/master, origin/HEAD)
> > Author: Jacob Lifshay <programmerjake at gmail.com>
> > Date: Thu Jun 3 10:58:53 2021 -0700
> >
> > bitwise moves never set exceptions or mess with FPSCR
>
> are we absolutely certain of that?
Yes. It seems obvious to me, since it's just a bitwise copy (like fmv). FP
exceptions and FPSCR only affect things where actual arithmetic/comparison/etc.
operations are performed.
> because if so it needs to be explicitly
> stated, rather than leaving it "unstated".
Go ahead and add that if you like.
>
> otherwise people will ask during the review.
Ok, though I'd guess they probably won't, since it's just a bitwise move.
> something like:
>
> "this bitwise move does not raise exceptions nor alter FPSCR or other status
> flags"
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