[Libre-soc-isa] [Bug 650] write rfc for OpenPower fpr <-> gpr moves/conversions

[bugzilla-daemon at libre-soc.org]

https://bugs.libre-soc.org/show_bug.cgi?id=650

--- Comment #10 from Jacob Lifshay <programmerjake at gmail.com> ---
fix formatting: luke you had mistakenly unindented the list of reasons to have
each FP -> Int conversion mode, I reindented those so they are correctly
grouped under the appropriate list entry.

Also:
commit bb9a2dcc50b656e07accaf1036edb3607ea82f6c (HEAD -> master, origin/master,
origin/HEAD)
Author: Jacob Lifshay <programmerjake at gmail.com>
Date:   Thu Jun 3 10:58:53 2021 -0700

    bitwise moves never set exceptions or mess with FPSCR

diff --git a/openpower/sv/int_fp_mv.mdwn b/openpower/sv/int_fp_mv.mdwn
index f28da1fe..dfb93c1d 100644
--- a/openpower/sv/int_fp_mv.mdwn
+++ b/openpower/sv/int_fp_mv.mdwn
@@ -129,7 +129,7 @@ move a 32-bit float from a GPR to a FPR, just copying bits.
Converts the
 32-bit float in `RA` to a 64-bit float, then writes the 64-bit float to
 `FRT`.

-TODO: Rc=1 variants? also, any exceptions or FPSCR bits set?
+TODO: Rc=1 variants?

 ### Float load immediate (kinda a variant of `fmvfg`)

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