[Libre-soc-isa] [Bug 650] write rfc for OpenPower fpr <-> gpr moves/conversions

[bugzilla-daemon at libre-soc.org]

https://bugs.libre-soc.org/show_bug.cgi?id=650

--- Comment #5 from Luke Kenneth Casson Leighton <lkcl at lkcl.net> ---
(In reply to Jacob Lifshay from comment #4)
> (In reply to Luke Kenneth Casson Leighton from comment #3)

> > one possibility is that it's added as a 64-bit prefixed version,
> > where the constant is made full 32-bit, mostly from the prefix.
> 
> that could also work... we need to beat fusing an int load immediate
> with a GPR -> FPR move though, which is not easy.

the LD itself is a cost, however yes a double whammy of less space
is better.

> Also, 64-bit instructions can't be SVP64-prefixed.

they can... with the shift register that is shared with REMAP. it's just a
pain.


> > 
> > the other possibility is, i notice the constants have zero in
> > the last 4 bits, and yet still cover a pretty large useful range
> 
> We really should cover at least all ints -16.0 to 16.0 so that needs at
> least 3 mantissa bits, more bits are preferred. We don't need all 8 exponent
> bits -- we could probably just use a 7-bit exponent and have the instruction
> re-expand it if we need space -- it's about as expensive as a
> sign-extension. I don't want to drop down to 6 exponent bits though -- I'd
> like to be able to represent 2^31, 2^32, and 2^63 since those are somewhat
> common constants.

ok.  hm.  i was thinking FP16 up until you mentioned that.

> > 
> > fmvis f4, 0x800 # writes -0.0 to f4
> > fmvis f4, 0x3F8 # writes +1.0 to f4
> > fmvis f4, 0xBF8 # writes -1.0 to f4
> > fmvis f4, 0xBFC # writes -1.5 to f4
> > fmvis f4, 0x7FC # writes +qNaN to f4
> > fmvis f4, 0x7F8 # writes +Infinity to f4
> > fmvis f4, 0xFF8 # writes -Infinity to f4
> > 
> > 12 bits dedicated to an immediate is still pretty large but with
> > there being only one destination this is doable:
> > 
> >     0-5   | 6-10 | 11-23 | 24-30 | 31
> >     Major | FRT  | UI    | XO    | Rc
> 
> Rc?! who needs that on a load immediate?! -- one more bit of mantissa...

:) sets CR1 as well... is that useful? probably not because the compiler
can statically determine what to do.

and i realised, bit 24 can also be used, so that's 14 bits.

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