[Libre-soc-isa] [Bug 571] svp64 vector loads: sub-dword selection before or after byte-reversal

[bugzilla-daemon at libre-soc.org]

https://bugs.libre-soc.org/show_bug.cgi?id=571

--- Comment #1 from Luke Kenneth Casson Leighton <lkcl at lkcl.net> ---
we had to close bug #570 because it was discussing an invalid version of the
spec.

the question is: what is the order of indexing vs bytereversal for getting data
into internal arithmetic order?

the answers are deducible from how an SV loop must appear to be exactly the
same as if sequential LD operations at the scalar level had been in the
instruction stream, instead.

this DEFINES how SV operates.  deviations are not permitted, except where
things clearly break or are simply never considered before.

thus:

ld{brx} in both LE *OR* BE when VL=2 is **DEFINED** to be two sequential
ld{brx} operations, back-to-back, executed in Program Order.

more in a minute

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