[Libre-soc-isa] [Bug 560] big-endian little-endian SV regfile layout idea

[bugzilla-daemon at libre-soc.org]

https://bugs.libre-soc.org/show_bug.cgi?id=560

--- Comment #79 from Alexandre Oliva <oliva at libre-soc.org> ---
you may *think* the iteration order is already decided, but it really isn't. 
the specification is incomplete.  it's ambiguous.  it works both ways.  but one
has to be chosen.  and if you say this was chosen a year ago, that's just not
true, because it's evident that the issue wasn't even considered, let alone
decided on.  the possibilities are equally compatible with the existing
specifications.

now, one of them will make for reasonable compiler implementation.

the other will make for huge compiler delays and risks and reworkings.

good luck getting funding and engineering to deal with the latter because you
refused to think about it now, pretending you'd done it before.

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