[Libre-soc-isa] [Bug 213] SimpleV Standard writeup needed

[bugzilla-daemon at libre-soc.org]

https://bugs.libre-soc.org/show_bug.cgi?id=213

--- Comment #48 from Luke Kenneth Casson Leighton <lkcl at lkcl.net> ---
https://libre-soc.org/openpower/openpower/sv/predication/?updated

ideas to be expanded there (cut paste comments from here).

another idea, expanding on override of VR SO/OV field: copy the incoming
predicate bit for that element and store it in SO foeld of CR associated with
that element result.

this would make it possible to use CR ops (crand/or/etc) combining them with
the comparison results (GT, LT, EQ) before then copying them back out to an
intreg and using the intreg as another predicate mask.

at the point at which the bits are copied from CRs to an intreg popcount (etc)
can be done.

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