[Libre-soc-isa] [Bug 533] design new CR instructions suitable for predication

[bugzilla-daemon at libre-soc.org]

https://bugs.libre-soc.org/show_bug.cgi?id=533

--- Comment #6 from Luke Kenneth Casson Leighton <lkcl at lkcl.net> ---
i notice that the CR 10-bit XO field column has 8 slots free.
Appendix C Book I-III v3.0B table 20 EXT19 p1156.

although oddly encoded, that would give the 8 possible bits
(mask and eq compares).

    crweird.eq RT, BB, mask
    crweird.lt RT, BB, mask
    crweird.ge RT, BB, mask
    crweird.un RT, BB, mask

and the bits from 11 thru 15 would be "ignore" (i'm looking at p41 v3.0B,
seeing in the tables per instruction how the bitfields are laid out).

then, moving them back would... errr... would it be good to have the same
mask+op 8-bit?  and to do something similar to clear/set?

   mtcrweird.eq RA, BA, mask
   ...
   ...

CR = CRfile[BA]
if mask[0]:
  CR[0] = a ^ RT[0]
if mask[1]
  CR[1] = b ^ RT[0]
if mask[2]
  CR[2] = c ^ RT[0]
if mask[3]
  CR[3] = d ^ RT[0]

bit 11 could be used to indicate that the instruction is crweird
or mtcrweird.

thoughts?

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