[Libre-soc-isa] [Bug 532] discuss iterative approach for statistical analysis of effectiveness of Compressed PowerISA encoding

bugzilla-daemon at libre-soc.org bugzilla-daemon at libre-soc.org
Sat Nov 21 21:12:18 GMT 2020


https://bugs.libre-soc.org/show_bug.cgi?id=532

--- Comment #9 from Alexandre Oliva <oliva at gnu.org> ---
FTR, information extracted from gcc's gcc/config/rs6000/rs6000.h about fixed
registers (assigned to special purposes) and register allocation order:

Special-purpose registers on ppc are:

r0: constant zero/throw-away
r1: stack pointer
r2: thread-local storage pointer in 32-bit mode
r2: non-minimal TOC register
r10: EH return stack adjust register
r11: static chain pointer
r13: thread-local storage pointer in 64-bit mode
r30: minimal-TOC/-fPIC/-fpic base register
r31: frame pointer
lr: return address register

the register allocation order in GCC (i.e., it takes the earliest available
register that fits the constraints) is:

   We allocate in the following order:
        fp0             (not saved or used for anything)
        fp13 - fp2      (not saved; incoming fp arg registers)
        fp1             (not saved; return value)
        fp31 - fp14     (saved; order given to save least number)
        cr7, cr5        (not saved or special)
        cr6             (not saved, but used for vector operations)
        cr1             (not saved, but used for FP operations)
        cr0             (not saved, but used for arithmetic operations)
        cr4, cr3, cr2   (saved)
        r9              (not saved; best for TImode)
        r10, r8-r4      (not saved; highest first for less conflict with
params)
        r3              (not saved; return value register)
        r11             (not saved; later alloc to help shrink-wrap)
        r0              (not saved; cannot be base reg)
        r31 - r13       (saved; order given to save least number)
        r12             (not saved; if used for DImode or DFmode would use r13)
        ctr             (not saved; when we have the choice ctr is better)
        lr              (saved)
        r1, r2, ap, ca  (fixed)
        v0 - v1         (not saved or used for anything)
        v13 - v3        (not saved; incoming vector arg registers)
        v2              (not saved; incoming vector arg reg; return value)
        v19 - v14       (not saved or used for anything)
        v31 - v20       (saved; order given to save least number)
        vrsave, vscr    (fixed)
        sfp             (fixed)

-- 
You are receiving this mail because:
You are on the CC list for the bug.


More information about the Libre-SOC-ISA mailing list