[Libre-soc-isa] [Bug 559] analyse implications of automatic detection of changing VL loop direction

[bugzilla-daemon at libre-soc.org]

https://bugs.libre-soc.org/show_bug.cgi?id=559

--- Comment #4 from Luke Kenneth Casson Leighton <lkcl at lkcl.net> ---
the original question was to do with whether gcc should rely on hardware
reversing the order of the VL loop so that register allocation need not be
concerned about the consequences of using overlapping ranges of registers.

the case where dest overlaps either *or both* src1 and src2 demonstrates that
overlap avoidance is going to be necessary, not just "nice to have".

i'm inclined to close this one as invalid.

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