[Libre-soc-isa] [Bug 535] setvl/setvli encoding & future reg file expansion

[bugzilla-daemon at libre-soc.org]

https://bugs.libre-soc.org/show_bug.cgi?id=535

--- Comment #9 from Luke Kenneth Casson Leighton <lkcl at lkcl.net> ---
whoops hit send by accident


loop:
      setvl VL=min(MVL,r5) # without vl
                           # into dest
      mfspr r3, VL # forced to add this
                   # as an extra op
      # ok now we know the amount
      # of vector elements that will be
      # done (in r3), r3 can be sub'd
      sub. r5, r5, r3 # copy of VL sub'd
      bnz loop # r5 not zero, go again

unless VL is copied into RT, the mfspr is 100% mandatory and that's an entire
instruction, mandatory overhead, in inner loops.

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