[Libre-soc-dev] Vector Supercomputing ISA and 3D GPU resources
Hendrik Boom
hendrik at topoi.pooq.com
Wed Sep 15 02:11:54 BST 2021
On Tue, Sep 14, 2021 at 10:01:48PM +0000, lkcl wrote:
>
> >Are we suggesting that ARM added an instruction to its ISA specifically
> >to support a particular programming language?
>
> no, we'rw not suggesting, at all, we're *saying* that's precisely what they did.
>
> this is pretty normal practice for ISA design. find a performance / power black spot, identify its usage, design instruction, check increase in performance, reduction in power consumption / {insert other benefit}, implement.
I remember hearing of one performance analysis that determined that some of the most
used instrucions were conditional branches. So they werked very hard optimising the
hardware for the next version of their machine for conditional branches. Once they
built it there was NO improvement in speed. Investigating, they discovered they had
optimized the wait loop.
-- hendrik
More information about the Libre-soc-dev
mailing list