[Libre-soc-dev] LD/ST Elwidth Overrides
Jacob Lifshay
programmerjake at gmail.com
Wed Sep 1 20:38:06 BST 2021
On Wed, Sep 1, 2021, 12:10 lkcl <luke.leighton at gmail.com> wrote:
>
>
> On September 1, 2021 6:41:27 PM UTC, Jacob Lifshay <
> programmerjake at gmail.com> wrote:
>
> >so, the reserved combination is signed, and everything else is
> >unsigned?
>
> (trim!! please! :)
>
(there wasn't much, so I left it in)
The index-reg elwidth override should apply even when all regs are scalar
(that's how webassembly will use it).
also, we should mark ffirst as banned when either base and/or index
registers are vectors. the table implies ffirst is only banned when the
index reg is vectorized:
imm(RA) RT.v RA.v no stride allowed
imm(RA) RT.s RA.v no stride allowed
imm(RA) RT.v RA.s stride-select allowed
imm(RA) RT.s RA.s not vectorised
RA,RB RT.v RA/RB.v ffirst banned
RA,RB RT.s RA/RB.v ffirst banned
RA,RB RT.v RA/RB.s VSPLAT possible
RA,RB RT.s RA/RB.s not vectorized
Jacob
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