[Libre-soc-dev] daily kan-ban update 30nov2021

[lkcl]

yesterday:

* helped andrey with pinmux testing, identify data 
   structures for IO
* sorted out core hazard vectors when regfile ports
   are not "merged" (3R2W instead of 1R1W regfiles)
* updated new FOSDEM VLSI devroom

today:

* got test_core.py working again (last used: 20
   months ago)
* issued back-to-back instructions and found 3 bugs
   immediately.

core.py now stands a reasonable chance of working as an in-order superscalar engine for most ALU operations.  Branch, LDST, TRAP, SPR and MMU are all currently set to "full stall" and must complete before any other instruction is permitted.

tomorrow:

* random instruction issue generation, to see if it copes.
* increasing the number of Function Units
  (Reservation Stations) to see if that works

l.