[Libre-soc-dev] [RFC] horizontal SVP64 vectors

[Jacob Lifshay]

On Thu, Jul 8, 2021, 06:17 Luke Kenneth Casson Leighton <lkcl at lkcl.net>
wrote:

> On 7/8/21, Richard Wilbur <richard.wilbur at gmail.com> wrote:
> >  The basic idea is to have a number of processing
> > elements which you configure as you decode a sequence of instructions and
> > connect up register access/dependencies.
>
> hmmm there was another processor around that did this. it didn't have
> "actual registers" but everything instead was expressed as chains: use
> the result of this computation as the input to *this* one etc. where
> the chains started from LOAD and ended at STORE.


Reminds me of https://en.wikipedia.org/wiki/Systolic_array and Petri Dish
computers (or whatever that's called, wikipedia didn't return any useful
results)

Jacob