[Libre-soc-dev] SVP64 auto-generated table for microwatt decoding

[Luke Kenneth Casson Leighton]

done.  that's better.  example:

    constant sv_minor_31_decode_rom_array :
             sv_minor_31_rom_array_t := (
    ....
    2#0000011010# => (P2, EXTRA3, RS, NONE, NONE, RA, NONE, CR0, Idx1,
NONE, NONE, Idx0, NONE, Idx0), -- cntlzw
    ....

the columns are:
* Twin/Single Predication
* EXTRA2/3
* in1/2/3/out
* CRIn/Out
* SVP64 reg-EXTRA-augment in1/2/3/out
* SVP64 reg-EXTRA-augment CRIn and CRout

the example says that:

* cntlzw can beTwin-Predicated (P2) (one predicate for source, one for dest)
* that bits 10-18 must be decoded as 3-bits per register-augmentation
(EXTRA3)
* that in1=RS (we know) and out=RA (we know) and also CR0 is an output
* that to Vector-augment 'in1' (RS) we must look up Index *1* of the bits
10-18 (bits 13-15)
* that to Vector-augment 'out' (RA) we must look up Index *0* of the bits
10-18 (bits 10-12)
* that to Vector-augment CRout (CR0) we must again also look up Index 0 to
see if it is "Vectorised".

l.