[Libre-soc-dev] SRAM for Libre-SOC

[Staf Verhaegen (FibraServi)]

Op 9/12/2021 om 10:41 schreef lkcl:
> On Thu, Dec 9, 2021 at 6:19 AM D. Mitch Bailey
> <d.bailey at shuharisystem.com> wrote:
>
>> OpenRAM does need work on space optimization and power rail connections.
>> The mos diffusion also needs more contacts in my opinion.
>>
>> Back in the day, I was on the team that implemented the SRAM/ROM
>> compilers for Renesas' cell phone SOC's.
> interesting!

Indeed, my background is in development of radiation hardened flow, 
amongst them std.cell, IO and SRAM compiler.

>> Staf, if you want any assistance, let me know.
> i believe the flexmem library is where it starts
> https://gitlab.com/Chips4Makers/c4m-flexmem/-/blob/master/c4m/flexmem/splibrary.py

Yes, my first task will be to stabilize the API of PDKMaster en co. 
somewhat. Otherwise contributing to what I do will be very frustrating. 
This is also part of a NLnet project and hopefully done somewhere in 
January.

>
> although with so much else going on, Staf had to do the 4k SRAM
> for ls180 by hand.

Yes and no. It's already coded to become a compiler but current code 
contains shortcuts so it is known to only work for the that specific 
SRAM instance with the layout rules for the used technology (e.g. TSMC 
0.18um).

greets,
Staf.


-- 
Chips want to be free.