[Libre-soc-dev] [RFC] SVP64 Data-dependent fail-first on CR operations (crand, cror, etc)
Richard Wilbur
richard.wilbur at gmail.com
Mon Aug 30 17:07:59 BST 2021
> On Aug 29, 2021, at 07:02, lkcl <luke.leighton at gmail.com> wrote:
>> On August 28, 2021 4:36:02 PM UTC, lkcl <luke.leighton at gmail.com> wrote:
>> https://libre-soc.org/openpower/sv/svp64/appendix/
>
>> other operations which *actually* operate on entire (complete) CR
>> Fields are usually only 3 bits for specifying the CR Field. these
>> *would* need the index mode.
>
> question:
>
> is it worthwhile to use the elwidth bits of the 24-bit RM, which are meaningless for at least the result if the result is a 4 bit CR Field, to provide additional fields?
>
> this is already done for SV Branches, the VLi field is for example in elwidth bit zero in SV Branch RM.
I think making meaningful use of resources at hand is a very good thing! Id est, to take a field which is meaningless in this context and be able to assign a useful meaning is more than worthwhile—it improves the expressiveness and POWER of the instruction set.
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