[Libre-soc-dev] [RFC] SVP64 Vertical-First Mode loops

[Jacob Lifshay]

On Wed, Aug 18, 2021, 15:17 lkcl <luke.leighton at gmail.com> wrote:

>
>
> On August 18, 2021 10:02:49 PM UTC, Richard Wilbur <
> richard.wilbur at gmail.com> wrote:
> >On Aug 18, 2021, at 13:06, lkcl <luke.leighton at gmail.com> wrote:
> >> basically, to do large DCT / FFT recursively, you split into two
> >halves, do each half at half the DCT/FFT size, then recombine the
> >results.
> >
> >Each half could use the same scalar coefficients.
>
> could... but remember: FFT of size N you need N coefficients. now you can
> only hold in regfile half an FFT as if you did it with Vertical-First Mode
>
> for DCT it is *N ln N* coefficients needed for a DCT of size N.  DCT of
> size 32 needs 32+16+8+4+2+1 registers for the COS coefficients!
>
> we just used the ENTIRE regfile!
>

well, you still need the registers for cos coefficients if you either load
them from memory or if you compute them with a cos instruction...

Jacob