[Libre-soc-dev] [RFC] SVP64 on branch instructions

[Luke Kenneth Casson Leighton]

ok so there are now two first unit tests, "sv.bc" and "sv.bc/all".
https://git.libre-soc.org/?p=openpower-isa.git;a=blob;f=src/openpower/decoder/isa/test_caller_svp64_bc.py;h=5378040085995813070ccaa9cbe28a1add9a5e81;hb=c3b9973df8edcb1f6c1583c2da693336af7d1921#l80

sv.bc/all makes a bit of a mess of the pseudocode, it's a Finite State Machine
where ISACaller is calling the sv.bc operation once per element.

in the case of sv.bc/all it is necessary to branch *ONLY* when *ALL*
tests are successful... but the tests actually need to be done.

normal bc pseudocode:

      if cond_ok then branch

sv.bc pseudocode:

     if cond_ok and last element in VL loop:
         branch

it's more complex than that, though.

     if NOT last element and cond NOT ok
         terminate entire VL loop with early-out

non-ALL mode (ANY mode) is more straightforward, but again,
on branch, you must not continue to do further tests!  so branch
definitely terminates the VL loop...

... but in Vertical-First Mode it's a completely different story,
much more like a standard scalar branch.

there's an awful lot going on, quite fascinating.

l.