[Libre-soc-dev] [RFC] SVP64 Vertical-First Mode, batch processing

lkcl luke.leighton at gmail.com
Thu Aug 12 23:14:48 BST 2021



On August 12, 2021 9:37:16 PM UTC, Richard Wilbur <richard.wilbur at gmail.com> wrote:

>Very cool indeed.  Sounds like Mitch Alsup’s MyISA 66000 design would
>be very interesting reading.  Is there public documentation?

ah no.  you can however email Mitch (check comp.arch newsgroup) and request it.

>
>It is interesting to me how reminiscent this is of my proposal back in
>1988-1990 of a massively serial machine that would decode a section of
>code and configure connections between functional units and data
>dependencies.  Then it would go run the code limited only by the timing
>of data availability.

intriguing

>What if svstep was a state associated with the branch instruction in
>the Finite State Machine implementing Vertical-First Mode instead of
>requiring a separate op code, cache space, and a decode slot?  Is
>svstep used outside of the Vertical-First Mode context?

yes it is.  sv.step (a Horizontal version of single-step) can be used to obtain a Vector of Condition Registers, where each CR Field contains whether a given src step is part of a "loop end condition".

let us say that VL=4, you call sv.step. (Rc=1)

the result will be that CR0=0
CR1=0
CR2=0
CR3=1

because VL=4, and the end condition of the loop 0..VL-1 terminates at CR3, CR3 gets a "1".

it gets more complex when REMAP is involved: there you can extract the end-points of the inner, middle *and* outer REMAP loop end-conditions.

e.g. if you use MATRIX remap, a 2x2 matrix:

CR0=b00
CR1=0b01
CR2=0b10
CR3=0b11



>[…]
>> i propose this change to:
>> 
>>     if HorizontalFirst
>>          if srcstep < VL
>>              srstsep increments
>>     else if VerticalFirst
>>          if srcstep < *MAXVL*
>>               srcstep increments
>> 
>> questions, comments?
>
>Sounds like a good thing.

my only concern is, should MVL be restricted to an immediate (for VFirst mode) or should it be allowed to be set via a register (RA).

whilst the logic behind making MVL compile-time static for Horizontal Mode is obvious, i haven't got my head round Vertical Mode yet.

l.



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