[Libre-soc-dev] VERSA_ECP5 JTAG TAP interface confirmed functional

[Jacob Lifshay]

On Thu, Apr 15, 2021 at 3:04 PM Luke Kenneth Casson Leighton
<lkcl at lkcl.net> wrote:
>
> On Thursday, April 15, 2021, Cesar Strauss <cestrauss at gmail.com> wrote:
>
> >
> > What about the ECPIX-5?
> >
> >
> > - 45K LUT and 85K LUT variants
> > - 256MB of DDR3L RAM
> >
> >
>  ooo good one, loads of interfaces too.

:) too bad it's currently out-of-stock. Libre-SOC has some money from
a donor who likes donating using cryptocurrencies instead of using
nlnet, maybe we could use some of that to buy some FPGAs for those who
don't have one/need a better one...

Jacob