[Libre-soc-dev] Question about smaller reg access

[Luke Kenneth Casson Leighton]

(lauri your list messages almost always end up in spam, apologies i only
saw this because jacob replied)

On Sunday, December 27, 2020, Jacob Lifshay <programmerjake at gmail.com>
wrote:

> The basic answer is that the compiler doesn't allocate just part of a
> 64-bit reg, it always allocates full 64-bit registers and leaves the extra
> space unused, so allocated vectors always start at a 64-bit boundary.
>
> If needed, code to access the middle of a 64-bit register can be
generated,
> just like a compiler can generate code to access a C-style bit-field.

this would either involve setting a single-predicate to have 0s in the
LSBs, or, if that is a pain actually move them down (or up) with a
twin-pred mv.  twin-pred mv is a multiple sequentially  ordered VINSERT.

we therefore do not need VSLIDE because 2pred does the job.

l.

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