[Libre-soc-bugs] [Bug 1044] SVP64 implementation of pow(x,y,z)

[bugzilla-daemon at libre-soc.org]

https://bugs.libre-soc.org/show_bug.cgi?id=1044

--- Comment #18 from Luke Kenneth Casson Leighton <lkcl at lkcl.net> ---
got rid of the addc - use adde but set CA to zero going in.

https://git.libre-soc.org/?p=openpower-isa.git;a=commitdiff;h=d612cd562f

inside the loop is now:

li t[4], 0
sv.maddedu
XER.CA=0
sv.adde

if done as vertical-first it is possible to detect when the
inner loop completes, and do branch-conditional CA=0/sv.adde

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