[Libre-soc-bugs] [Bug 1175] New: implement mcrxrx in ISACaller
bugzilla-daemon at libre-soc.org
bugzilla-daemon at libre-soc.org
Wed Sep 27 04:13:16 BST 2023
https://bugs.libre-soc.org/show_bug.cgi?id=1175
Bug ID: 1175
Summary: implement mcrxrx in ISACaller
Product: Libre-SOC's first SoC
Version: unspecified
Hardware: PC
OS: Linux
Status: IN_PROGRESS
Severity: enhancement
Priority: ---
Component: Source Code
Assignee: programmerjake at gmail.com
Reporter: programmerjake at gmail.com
CC: libre-soc-bugs at lists.libre-soc.org,
programmerjake at gmail.com
Blocks: 1044
NLnet milestone: ---
while writing the 512x256-bit divmod algorithm for bug #1044, I discovered
mcrxrx wasn't implemented properly, so, since it's pretty simple, I'm just
implementing it and writing a unit test, since I want to use it.
mcrxr is likewise not implemented properly, however it isn't part of PowerISA
v3.1B, that encoding is marked reserved, so I'm just leaving it.
Referenced Bugs:
https://bugs.libre-soc.org/show_bug.cgi?id=1044
[Bug 1044] SVP64 implementation of pow(x,y,z)
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