[Libre-soc-bugs] [Bug 982] Support PowerPC ABI in ISACaller

[bugzilla-daemon at libre-soc.org]

https://bugs.libre-soc.org/show_bug.cgi?id=982

--- Comment #45 from Jacob Lifshay <programmerjake at gmail.com> ---
(In reply to Luke Kenneth Casson Leighton from comment #44)
> (In reply to Jacob Lifshay from comment #42)
> 
> > all *in-code* address offsets are already handled by python for the
> > simulator 
> 
> static binaries.  non-position-independent (non -fPIC) code.
> think it through.

all insns in those static binaries are simulated by the simulator.

so, when the simulator sees lbz r3, 28(r5), it effectively does
gprs[3] = mem[28 + gprs[5]]
mem.__getitem__ (python builtin) is what adds the offset.

so, if the statically linked binary's ELF headers says to load it with .data at
0x40000, then the binary runs an insn to store to .data + 0x10, the simulator
will try to write to mem[0x40010], which python's __setitem__ will translate to
*(mem.the_base_addr + 0x40010) = the_byte

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