[Libre-soc-bugs] [Bug 982] Support PowerPC ABI in ISACaller

[bugzilla-daemon at libre-soc.org]

https://bugs.libre-soc.org/show_bug.cgi?id=982

--- Comment #5 from Luke Kenneth Casson Leighton <lkcl at lkcl.net> ---
(In reply to Andrey Miroshnikov from comment #1)
> Reassigning this bug to me (with Shriya cc'd so she can study along).
> 
> From my understanding of the task, the actual work would require:
> 
> - In ISACaller, parse the 'sc' (system call) PowerISA instruction and
> extract the system call number argument.

r3 i think you'll find. check the disasm on a simple binary using
open() write() and close().


> - Import relevant library into Python which allows to make system calls.

which you may need to write.

> - Look up PowerISA ABI, to see which system call arguments correspond to
> open()/read)()/write() (the system calls chosen for the scope of this task).

been in the media/ directory for 3 years now, and how syscalls work
i think i found links online. basically they are exactly
the same as a function (set up regs) but instead of "branch to address"
you do "sc".

https://git.libre-soc.org/?p=openpower-isa.git;a=blob;f=media/calling-conv;hb=HEAD


> - Extend the ISACaller (with if-elif-else type of block) which will make the
> relevant system call depending on the 'sc' instruction argument.

just write a unit test that calls one instruction: "sc".
then see what happens.

> The hardest part of the task seems to me to be understanding where to modify
> the ISACaller simulator, so I'll begin by making sure I can run example
> programs with it (and make a modified binary which includes a system call
> instruction).

no: just write *one* unit test with *one* instruction in it (sc).
do not attempt to use pypowersim on the initial phase.
that comes later once *even one* system call has been verifed
by at least one unit test (each).

you know the drill, you know how python projects work (unit tests,
unit tests, unit tests), you know how that online "word game" works
("what tiny steps get me from Word ABCD to word XYZW").

going directly to pypowersim is *clearly* too much with zero intermediary
steps that will utterly overwhelm you, when you know next to nothing
about the details involved, so why even attempt it?

therefore logically it is your responsibility to work out the tiny
intermediary steps. can i please not be put into a position of having
to remind you of this again given that i have repeated it so many
times already? i will assume that i do not need to say this again.

-- 
You are receiving this mail because:
You are on the CC list for the bug.