[Libre-soc-bugs] [Bug 1150] New: implement PO9 changeover and associated tasks

[bugzilla-daemon at libre-soc.org]

https://bugs.libre-soc.org/show_bug.cgi?id=1150

            Bug ID: 1150
           Summary: implement PO9 changeover and associated tasks
           Product: Libre-SOC's first SoC
           Version: unspecified
          Hardware: Other
                OS: Linux
            Status: CONFIRMED
          Severity: enhancement
          Priority: ---
         Component: Source Code
          Assignee: lkcl at lkcl.net
          Reporter: lkcl at lkcl.net
                CC: libre-soc-bugs at lists.libre-soc.org
   NLnet milestone: NLnet.2022-08-107.ongoing
    parent task for 961
 budget allocation:

As part of bug #952 - the NLnet 2022 OPF ISA WG Grant 2022-08-051 -
it was established that PO9 is a candidate for use by SVP64 instead
of shoe-horning into PO1.  That now needs to be implemented
along-side its knock-on implications in ISACaller, the insndb, and
binutils. Additionally there are some instructions easy to implement
(LD/ST-post-update) that are beneficial to performance, that again
came out of the OPF RFC Feedback process.

---

* removing use of PO1 and replacing with PO9
* creating EXT200-263 under PO9
* moving all LD/ST-post-update to EXT200-263, with their exact
 respective *pre-update* EXT000-063 encodings
 (example: lhz is EXT040, therefore lhzp *is* EXT240, no
  arguing, no question: it just *is*)
* freeing up the LDST_IMM SVP64 "post-update" bit and allocating
 it instead to Vector-Immediate (with elwidths on VIs)
* using the reserved Normal/Arithmetic mode also for VI
* finishing LDST-EXTRA-322

involves:

* specification writing and checking
* insndb updating (two ways: PO9 itself *and* the new EXT2xx
* a new PowerDecoder (for EXT2xx)
* test_caller* unit tests
* writing the LD/ST-post-update mdwn files (Nicholas, new member)
* ISACaller updates
* binutils updates (to SVP64 as well as a new EXT2xx area)

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