[Libre-soc-bugs] [Bug 1225] ISACaller __decode_prefix is damaging the output by setting is_svp64_mode to True on a scalar add

bugzilla-daemon at libre-soc.org bugzilla-daemon at libre-soc.org
Thu Nov 30 02:30:41 GMT 2023


Jacob Lifshay <programmerjake at gmail.com> changed:

           What    |Removed                     |Added
             Status|IN_PROGRESS                 |RESOLVED
         Resolution|---                         |WORKSFORME

--- Comment #5 from Jacob Lifshay <programmerjake at gmail.com> ---
(In reply to Jacob Lifshay from comment #1)
> which commit produces this?

since you never replied to that, I tested on:

commit b427a6cc523dc5a277d0e379848e4bad90568592
Author: Luke Kenneth Casson Leighton <lkcl at lkcl.net>
Date:   Wed Nov 29 15:06:18 2023 +0000

    bug #672: shorter pospopcount but not fully working

I was unable to reproduce the bug after running the test over 250 times.

I modified setup_next_insn in caller.py (the only spot is_svp64_mode can be set
to True) to add an allowlist of which CIA values are known to be SVP64

--- a/src/openpower/decoder/isa/caller.py
+++ b/src/openpower/decoder/isa/caller.py
@@ -1777,6 +1777,9 @@ class ISACaller(ISACallerHelper, ISAFPHelpers, StepLoop):
         pfx = self.__decode_prefix(opcode)
         log("prefix test: opcode:", pfx.PO, bin(pfx.PO), pfx.id)
         self.is_svp64_mode = bool((pfx.PO == 0b000001) and (pfx.id == 0b11))
+        if self.is_svp64_mode:
+            assert self.pc.CIA.value in (0xC, 0x1C, 0x24, 0x2C, 0x34), \
+                "pc = 0x%x" % self.pc.CIA.value
         # set SVP64 decode
         yield self.dec2.is_svp64_mode.eq(self.is_svp64_mode)

and then tested on 32 threads in an infinite loop in bash:
for i in {0..31}; do (while SILENCELOG=1 python
src/openpower/decoder/isa/test_caller_svp64_pospopcount.py &> log"$i".txt; do
echo "$i passed"; done; while sleep 1; do echo "$i error"; done)& done

since I can't reproduce it, we can look at your log:
(In reply to Luke Kenneth Casson Leighton from comment #0)
> .long 0x05402000 .long
>    ABSOLUTELY SHOULD NOT BE HAPPENING >>> svp64 <<< sim-execute 0x1c addi
> 6,0,0

0x1C on that commit is sv.addi *24, 0, 0 on line 49:

0x1C being a svp64 instruction is correct there.

You are receiving this mail because:
You are on the CC list for the bug.

More information about the libre-soc-bugs mailing list