[Libre-soc-bugs] [Bug 1225] New: ISACaller __decode_prefix is damaging the output by setting is_svp64_mode to True on a scalar add

[bugzilla-daemon at libre-soc.org]

https://bugs.libre-soc.org/show_bug.cgi?id=1225

            Bug ID: 1225
           Summary: ISACaller __decode_prefix is damaging the output by
                    setting is_svp64_mode to True on a scalar add
           Product: Libre-SOC's first SoC
           Version: unspecified
          Hardware: PC
                OS: Linux
            Status: CONFIRMED
          Severity: enhancement
          Priority: ---
         Component: Source Code
          Assignee: programmerjake at gmail.com
          Reporter: lkcl at lkcl.net
                CC: libre-soc-bugs at lists.libre-soc.org
            Blocks: 672
   NLnet milestone: ---

3947ab6d3 (Jacob Lifshay                2023-06-13 22:51:14 -0700 1751)    
__PREFIX_CACHE = SVP64Instruction.Prefix(SelectableInt(value=0, bits=32))
3947ab6d3 (Jacob Lifshay                2023-06-13 22:51:14 -0700 1752)
3947ab6d3 (Jacob Lifshay                2023-06-13 22:51:14 -0700 1753)     def
__decode_prefix(self, opcode):
3947ab6d3 (Jacob Lifshay                2023-06-13 22:51:14 -0700 1754)        
pfx = self.__PREFIX_CACHE
3947ab6d3 (Jacob Lifshay                2023-06-13 22:51:14 -0700 1755)        
pfx.storage.eq(opcode)
3947ab6d3 (Jacob Lifshay                2023-06-13 22:51:14 -0700 1756)        
return pfx
3947ab6d3 (Jacob Lifshay                2023-06-13 22:51:14 -0700 1757)


i have an extremely weird situation with test_sv_pospopcount() where
prefix_test is coming up *TRUE* on a *SCALAR* add instruction...
on an *intermittent* basis.

 >>SCALAR--->>>          "addi 6, 0, 0",             # initialise r6 to zero

ld from addr 0x1c width 4 False True True
ld mem @ 0x1c rem 0 : 0x5402000
Read 0x5402000 from addr 0x1c
setup: 0x1c 0x5402000 0b101010000000010000000000000
CIA NIA True 28 28
concat 1 SelectableInt(value=0x1, bits=6)
prefix test: opcode: concat 1 SelectableInt(value=0x1, bits=6)
[6]0x1 0b1 concat 1 SelectableInt(value=0x3, bits=2)
[2]0x3
concat 1 SelectableInt(value=0x1, bits=6)
SelectableInt __eq__ SelectableInt(value=0x1, bits=6) SelectableInt(value=0x1,
bits=6)
    eq 1 1 True
concat 1 SelectableInt(value=0x3, bits=2)
SelectableInt __eq__ SelectableInt(value=0x3, bits=2) SelectableInt(value=0x3,
bits=2)
    eq 3 3 True
concat 1 SelectableInt(value=0x2000, bits=24)
svp64.rm 0b10000000000000
    svstate.vl 8
    svstate.mvl 8
ld from addr 0x20 width 4 False True True
ld mem @ 0x20 rem 0 : 0x38c00000
Read 0x38c00000 from addr 0x20
     svsetup: 0x20 0x38c00000 0b111000110000000000000000000000
concat 1 SelectableInt(value=0x2000, bits=24)
    0x5402000
.long 0x05402000 .long
   ABSOLUTELY SHOULD NOT BE HAPPENING >>> svp64 <<< sim-execute 0x1c addi 6,0,0
get assembly name asmcode 6 2 0x38c00000 0b0
ov 0 en 0 rc 0 en 0 op 2
int_op 2
call addi addi
is_svp64_mode True addi

caches should NEVER be added to ISACaller as they are *optimisations*.
given that this is an insanely complex Finite State Machine, caches
are PROHIBITED.

please can you resolve removing this unauthorized cacheing code from
ISACaller.


Referenced Bugs:

https://bugs.libre-soc.org/show_bug.cgi?id=672
[Bug 672] create SVP64 demo / unit test "positional popcount"
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