[Libre-soc-bugs] [Bug 1220] New: An introduction to Formal Verification of Digital Circuits

bugzilla-daemon at libre-soc.org bugzilla-daemon at libre-soc.org
Tue Nov 28 17:15:01 GMT 2023


            Bug ID: 1220
           Summary: An introduction to Formal Verification of Digital
           Product: Libre-SOC's first SoC
           Version: unspecified
          Hardware: PC
               URL: https://pretalx.fosdem.org/fosdem-2024/talk/review/ERC
                OS: Linux
            Status: CONFIRMED
          Severity: enhancement
          Priority: ---
         Component: Conferences
          Assignee: cestrauss at gmail.com
          Reporter: cestrauss at gmail.com
                CC: libre-soc-bugs at lists.libre-soc.org
   NLnet milestone: ---

The idea is to give a little background on how Formal Verification work, the
available ecosystem of tools, show some small examples on how to use them, and
some practical results from real-life usage.

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