[Libre-soc-bugs] [Bug 1157] Implement poly1305

bugzilla-daemon at libre-soc.org bugzilla-daemon at libre-soc.org
Tue Nov 21 15:36:35 GMT 2023


--- Comment #38 from Sadoon Albader <sadoon at albader.co> ---
(In reply to Luke Kenneth Casson Leighton from comment #35)
> sadoon read this unit test.
> https://git.libre-soc.org/?p=openpower-isa.git;a=blob;f=src/openpower/
> decoder/isa/test_caller_svindex.py;h=36bb6e837;hb=191a4b0cf#l92

Looking at this unit test again after toying with it and changing values here
and there and I now understand much better.

I had expected the values to be filled with ASM as well, but here we're
(understandably) using python to override the registers as it's much simpler
that way.

The obligatory question then:

Would it be reasonable to just prepare the registers with the data we need and
just do the SVP64 parts in ASM? Also by extension, setting svstate.x to the
needed values might help me finish up the implementation faster. Even if we
needed the actual SVP64 ASM in the end, I'd at least get to a known working
state that I can translate to ASM.

I hope I'm making sense :)

You are receiving this mail because:
You are on the CC list for the bug.

More information about the libre-soc-bugs mailing list