[Libre-soc-bugs] [Bug 1207] New: evaluate compatibility with microwatt's sc

[bugzilla-daemon at libre-soc.org]

https://bugs.libre-soc.org/show_bug.cgi?id=1207

            Bug ID: 1207
           Summary: evaluate compatibility with microwatt's sc
           Product: Libre-SOC's first SoC
           Version: unspecified
          Hardware: PC
                OS: Linux
            Status: IN_PROGRESS
          Severity: enhancement
          Priority: ---
         Component: Source Code
          Assignee: programmerjake at gmail.com
          Reporter: programmerjake at gmail.com
                CC: libre-soc-bugs at lists.libre-soc.org, lkcl at lkcl.net,
                    programmerjake at gmail.com
            Blocks: 1177
   NLnet milestone: ---

copied from:
https://bugs.libre-soc.org/show_bug.cgi?id=1177#c22

(In reply to Luke Kenneth Casson Leighton from bug #1177 comment #21)
> (In reply to Jacob Lifshay from bug #1177 comment #20)
> > I also fixed sc and the previously-working tests for it, since SRR1 is
> > specified to have bits 33:36 set to 0, 42:43 set to LEV (always 0 for now),
> > and 44:47 set to 0. SRR1[TRAP] is *not* set.
> 
> please revert aaaalll of them. we are compatible with MICROWATT.
> i keep having to tell you this.

well, my changes make us *compatible* with microwatt again:
on sc-test branch (based off latest master):
https://git.libre-soc.org/?p=microwatt.git;a=commitdiff;h=44eab364aee1a7cb6198cb148d68a065715a434a

make -C sc_test
ln -sf sc_test/hello_world.bin main_ram.bin
make DOCKER=1
./core_tb > /dev/null

gives the following output on my computer:
before sc:
SRR0 = 0x0000000012345678 SRR1 = 0x0000000000005678 MSR = 0x90000000783F2903
sc
after sc:
SRR0 = 0x000000000000112C SRR1 = 0x8000000000002903 MSR = 0x80000000783F0001
before sc:
SRR0 = 0x0000000012345678 SRR1 = 0x0000000000005678 MSR = 0x9000000000000003
sc
after sc:
SRR0 = 0x000000000000112C SRR1 = 0x8000000000000003 MSR = 0x8000000000000001
<snip>

as you can see, microwatt sc doesn't set SRR1[TRAP] (which would be 0x20000),
and it also clears all the SRR1 bits that sc is supposed to
(basically SRR1 &= ~0x783f0000)


Referenced Bugs:

https://bugs.libre-soc.org/show_bug.cgi?id=1177
[Bug 1177] revert unauthorized change to pseudocode language
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