[Libre-soc-bugs] [Bug 979] Implement C-based Power ISA decoder compiler

[bugzilla-daemon at libre-soc.org]

https://bugs.libre-soc.org/show_bug.cgi?id=979

--- Comment #5 from Dmitry Selyutin <ghostmansd at gmail.com> ---
OK, it looks like I have something already. Still working on that, but the
result looks promising. Here is the sketch; I've deliberately dropped "parts"
of the code (8K+ lines).

static const struct svp64_operand svp64_operands[] = {
    /* snip */
    [29] = /* SVxd */ {
        .asm = svp64_operand_nonzero_asm,
        .dis = svp64_operand_nonzero_dis,
        .fields = {6, 7, 8, 9, 10},
    },
    /* snip */
    [64] = /* FRT */ {
        .asm = svp64_operand_fpr_asm,
        .dis = svp64_operand_fpr_dis,
        .fields = {6, 7, 8, 9, 10},
    },
    /* snip */
    [70] = /* FRA */ {
        .asm = svp64_operand_fpr_asm,
        .dis = svp64_operand_fpr_dis,
        .fields = {11, 12, 13, 14, 15},
    },
    /* snip */
};

static const struct svp64_instruction svp64_instructions[] = {
    /* snip */
    {
        .name = "fpow.",
        .opcode = {
            .value = 0xfc0007db,
            .mask = 0xfc0007ff,
        },
        .operands = {
            /* FRT */ [64] = &svp64_operands[64],
            /* FRA */ [70] = &svp64_operands[70],
            /* FRB */ [71] = &svp64_operands[71],
        },
    },
};

As you can see, the overall code structure is somewhat familiar... :-) This
generation needs two visitors, where the first one creates a compact table of
operands and the second one creates the instructions. Perhaps there will be
more visitors, we have to output more entries.

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