[Libre-soc-bugs] [Bug 1025] create IEEE754 FP Pipelines and decoder for TestIssuer

[bugzilla-daemon at libre-soc.org]

https://bugs.libre-soc.org/show_bug.cgi?id=1025

--- Comment #6 from Luke Kenneth Casson Leighton <lkcl at lkcl.net> ---
(In reply to Jacob Lifshay from comment #4)
> I adjusted the costs for different tasks, and figured out what would fit in
> our EUR 8000 budget (it ended up excluding all Libre-SOC instructions, so I
> think some of those should just be moved to #1026 where we explicitly have a
> budget for Libre-SOC instructions)

not sure yet. see how it goes.

> I picked:
  ....

  it is a good start, gives the general idea of cost, but is missing
preparation (please find where i described it already) and regfile
profile analysis and documentation.  also adding regfiles, and prep
code to initialise then extract them in the TestAPI. and adding
config params, and adding TestIssuer options, all the way to Makefile
to compile with or without FP.


> * add FP loads to soc.git
>   we need a way to get data in/out of FP registers

ignore LD/ST initially and have the unit tests pre-arrange values
in regs. i had to add that for GPRs, and so adding the ability
to up!oad into FPRs prior to starting the nmigen sim is *another*
task on the list.

please follow the following incremental strategy
as top-level bugs:

* add FPR regfile **ONLY** plus do the pipeline reg allocation
  analysis.  grep all code for "IntRegs" and duplicate all sections,
  then document the proposed pipeline reg allocation.
  - fneg will be in 1R1W (plus FPSCR plus CR1, read and write)
  - fmac in 3R1W (plus FPSCR CR1)
  - fadd *also* consider in 3R1W but with mul as "no input".
  - fld/fst as another (bear in mind these are special-case)

* do the 1in1out as one bug "group"

* do 3r1w as another

* do LD/ST as another

* add FPSCR and CR1 to all pipelines *as a totally separate set of
  tasks* with their own toplevel budget.  reason: look in common_input
  and output_stage.py, the same can be done for CR1 / FPSCR.
  FPSCR regfile can copy XERRegs style.

this will give a coarse granularity that NLnet will be happier with,
and is a safer incremental approach.

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