[Libre-soc-bugs] [Bug 716] PartitionedSignal Slice and Part needed for __getitem__

bugzilla-daemon at libre-soc.org bugzilla-daemon at libre-soc.org
Fri Oct 15 07:41:32 BST 2021


Luke Kenneth Casson Leighton <lkcl at lkcl.net> changed:

           What    |Removed                     |Added
            Summary|PartitionedSignal Slice and |PartitionedSignal Slice and
                   |__getitem__ needed          |Part needed for __getitem__
           Assignee|lkcl at lkcl.net               |programmerjake at gmail.com

--- Comment #1 from Luke Kenneth Casson Leighton <lkcl at lkcl.net> ---

like Value.abs and Value.implies, Value.__getitem__ is in
terms of other Value.xxxx operations.  a SimdSignal.__getitem__
is *not* required.  once SimdSignal.__Slice__ and part are written
simdsignal[start:end:step] should just magically "work"
as intuitively expected.

thank goodness Slice and Part take fixed constants only
(unlike Array)

the basic principle is that the submodule 
(call them slice.py and part.py) does all
the heavy lifting, and a "helper" (see pcat.py, 
prepl.py) is responsible for auto-instantiating an
on-demand instance of that submodule followed by
returning the output *of* that module, which, back
in the SimdSignal override, simply returns that
submodule output as *its* return result.

it's a pretty straightforward trick that only got
one scary moment for the Assign override but i managed
to work that out, thank goodness.

you _should_ be able to just use e.g. repl.py as a base
template, i did cat.py first then used it to create repl.py
dont use assign.py as the starting point it operates
differently (returns statements not a signal)

you can check the git history (commits are in bug #458)
for the sequence i did, cat.py first, pcat.py as an afterthought,
integrate submodule into partsig.py third and finally
unit test fourth (each as separate commits)

should be very straightforward, and by starting from
either cat.py or repl.py you will get to see how PartType

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