[Libre-soc-bugs] [Bug 730] adapt ALU test cases to include expected results

[bugzilla-daemon at libre-soc.org]

https://bugs.libre-soc.org/show_bug.cgi?id=730

--- Comment #58 from Luke Kenneth Casson Leighton <lkcl at lkcl.net> ---
adde yeah looks great

 506                 s = ((initial_regs[1] & 0x1000_0000_0000_0080)>>7)&0x1
 507                 if s == 1:
 508                     value = 0xffff_ffff_ffff_ff<<8
 509                 else:
 510                     value = 0x0
 511                 e.intregs[3] = value | (initial_regs[1] & 0xff)

this can go into a function... ah! i found one

  36 def exts(value, bits):
  37     sign = 1 << (bits - 1)
  38     return (value & (sign - 1)) - (value & sign)

use this:

from openpower.helpers import exts

then 506 to 511 is replaced with:

506      e.intregs[3] = exts(initialregs[1], 8) & ((1<<64)-1)

same for extsh and extsw except 16 and 32 as arg not 8

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