[Libre-soc-bugs] [Bug 50] nmigen pinmux

bugzilla-daemon at libre-soc.org bugzilla-daemon at libre-soc.org
Fri Nov 19 13:30:32 GMT 2021


--- Comment #41 from Luke Kenneth Casson Leighton <lkcl at lkcl.net> ---
(In reply to andrey from comment #40)

> I just noticed that the server script has an input argument "server".
> Calling:
> python3 test_jtag_tap_srv.py server
> Causes the script to hang, I guess waiting for a connection.

+        print ("running server only as requested, use openocd remote to test")

$ ls -altr !$
ls -altr debug/test/openocd_test.sh
-rwxr-xr-x 1 lkcl lkcl 255 Oct 15  2020 debug/test/openocd_test.sh

run it from the soc directory.

(In reply to andrey from comment #39)

> Terminal 2:
> - cd ~/src/soc/src/soc/debug/test/
> - python3 test_jtag_tap.py

that's a (duplicate) stand-alone version.  notice the two

    sim.add_sync_process(wrap(jtag_sim(dut))) # actual jtag tester
    sim.add_sync_process(wrap(dmi_sim(dut)))  # handles (pretends to be) DMI

lkcl at fizzy:~/src/libresoc/soc/src/soc$ python3 debug/test/test_jtag_tap.py 
idcode 0x18ff
        dmi wen, addr 0 0
        read ctrl reg 4
dmi ctrl status 0x4
        dmi wen, addr 0 1
        dmi wen, addr 0 0
        read ctrl reg 4
dmi ctrl status 0x4
        dmi wen, addr 1 0
        write ctrl reg 5 6
        dmi wen, addr 0 1
        dmi wen, addr 0 0
        read ctrl reg 6
dmi ctrl status 0x6
        dmi wen, addr 0 1
        dmi wen, addr 0 3
        read msr reg
dmi msr 0xdeadbeef
        dmi wen, addr 0 4
wb write 0x0
wb read 0xfeef
dmi sim stopping

>   File "test_jtag_tap_srv.py", line 66, in jtag_sim
>     yield srv_dut.ios[0].pad.i.eq(1)
> KeyError: 0

this should be perfectly fine.  no such exception occurs here,
so i don't know what is different.  extensive debug printing
and vcd tracing will - eventually - find out what the hell is
going on there.  let's discuss on IRC.

> Error in when running server in Terminal 2:
>   File "test_jtag_tap.py", line 118, in jtag_sim
>     assert status == 0
> AssertionError

no idea, so i just altered the test to assert against the
value thats' returned (6).


> I don't know what causes Error1, but Error2 looks like it might be formal
> verification error.

nope, that's a python assert.

You are receiving this mail because:
You are on the CC list for the bug.

More information about the libre-soc-bugs mailing list