[Libre-soc-bugs] [Bug 730] adapt ALU test cases to include expected results

bugzilla-daemon at libre-soc.org bugzilla-daemon at libre-soc.org
Thu Nov 11 10:11:25 GMT 2021


--- Comment #35 from Luke Kenneth Casson Leighton <lkcl at lkcl.net> ---
(In reply to klehman9 from comment #27)
> Yeah, solution I'm thinking of for this is to revert my last fix which
> basically sets the cr bits properly in expected. 

yes, this was the error - the code i wrote already took care of CR field

however this error was masked by another error:

     def compare(self, s2):
         # Compare int registers
-        for i, (self.intregs, s2.intregs) in enumerate(
+        for i, (intreg, intreg2) in enumerate(

         # CR registers
-        for i, (self.crregs, s2.crregs) in enumerate(
+        for i, (crreg, crreg2) in enumerate(
                 zip(self.crregs, s2.crregs)):

that was *destroying* self.crregs and s2.crregs, leaving a CR field
value (modifying) both self.crregs and s2.crregs

i've sorted that (investigating with Veera) and it's fine now.

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