[Libre-soc-bugs] [Bug 580] PowerDecoder needs to redirect MMU SPRs to the MMU

[bugzilla-daemon at libre-soc.org]

https://bugs.libre-soc.org/show_bug.cgi?id=580

--- Comment #6 from Luke Kenneth Casson Leighton <lkcl at lkcl.net> ---
tobias note this:

            for i, x in enumerate(SPR):
                              vvvvv
                with m.Case(x.value):     <<==========
                              ^^^^^
                    m.d.comb += self.spr_o.data.eq(i)
                    m.d.comb += self.spr_o.ok.eq(1)

which is not being done here:

                  ((spr == SPR.DSISR) | (spr == SPR.DAR))):

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