[Libre-soc-bugs] [Bug 583] Implement simple VL for-loop in nMigen for TestIssuer

bugzilla-daemon at libre-soc.org bugzilla-daemon at libre-soc.org
Sat Feb 27 12:54:03 GMT 2021


--- Comment #44 from Luke Kenneth Casson Leighton <lkcl at lkcl.net> ---
cesar i took out the manual creation of svp64_dest_vector in ISACaller
and put in PowerDecoder.no_out_vec instead, confirmed that the unit
test test_caller_svp64.py still works.

line 1064:


the issue FSM should now be ridiculously simple.

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