[Libre-soc-bugs] [Bug 583] Implement simple VL for-loop in nMigen for TestIssuer

[bugzilla-daemon at libre-soc.org]

https://bugs.libre-soc.org/show_bug.cgi?id=583

--- Comment #44 from Luke Kenneth Casson Leighton <lkcl at lkcl.net> ---
cesar i took out the manual creation of svp64_dest_vector in ISACaller
and put in PowerDecoder.no_out_vec instead, confirmed that the unit
test test_caller_svp64.py still works.

line 1064:

https://git.libre-soc.org/?p=soc.git;a=blob;f=src/soc/decoder/isa/caller.py;h=acaac1f7212c68c9c631d1626adc470f7fa5751f;hb=HEAD#l1064

the issue FSM should now be ridiculously simple.

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