[Libre-soc-bugs] [Bug 583] Implement simple VL for-loop in nMigen for TestIssuer
bugzilla-daemon at libre-soc.org
bugzilla-daemon at libre-soc.org
Tue Feb 23 19:12:58 GMT 2021
https://bugs.libre-soc.org/show_bug.cgi?id=583
--- Comment #39 from Luke Kenneth Casson Leighton <lkcl at lkcl.net> ---
also:
* FETCH FSM will initiate handshake to ISSUE FSM
* ISSUE FSM will initiate handshake to EXECUTE FSM
* EXECUTE FSM will initiate handshake back to ISSUE FSM on completion
- and also set (optionally) pc_changed, insn_done, and (optionally)
sv_changed
* ISSUE FSM checks loop conditions. if exiting it will *PASS ON*
insn_done and pc_changed to FETCH FSM, and initiate
handshake back to ISSUE FSM
it is important that there be a split there, insn_done is probably
enough...
https://git.libre-soc.org/?p=soc.git;a=blob;f=src/soc/simple/issuer.py;h=5ec00ca4ac6ccac038d6ca1f5b05dae413a191e6;hb=09b5ec626157143d593cb294f664a4b611937d0c#l258
yes it is.
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