[Libre-soc-bugs] [Bug 600] Fix MSB0 issues in the SVP64 Assembler, Simulator and Decoder

bugzilla-daemon at libre-soc.org bugzilla-daemon at libre-soc.org
Sun Feb 21 11:22:31 GMT 2021


https://bugs.libre-soc.org/show_bug.cgi?id=600

--- Comment #5 from Cesar Strauss <cestrauss at gmail.com> ---
(In reply to Cesar Strauss from comment #4)
> I'll now proceed to use the methods of soc/consts.py to replace all the
> MSB-i instances with big-endian based constants.

I think I converted all hardcoded instances of MSB-i in the original patch to
symbolic.

Now, I will move the field selection function to nmutil, making it accept a
Module for adding combinatorial logic, and returning a Signal. That way, it
becomes explicit that the function really adds wires to the design.

-- 
You are receiving this mail because:
You are on the CC list for the bug.


More information about the libre-soc-bugs mailing list