[Libre-soc-bugs] [Bug 588] add SVP64 to PowerDecoder2

[bugzilla-daemon at libre-soc.org]

https://bugs.libre-soc.org/show_bug.cgi?id=588

--- Comment #6 from Luke Kenneth Casson Leighton <lkcl at lkcl.net> ---
(In reply to Cesar Strauss from comment #5)
> The augmented decoder will stay stateless (purely combinatorial) right? 

yes absolutelyn

> it will need both the 32-bit prefix and the 32-bit suffix at the same time,
> correct?

yes.  at the moment the only augmentation needed is EXTRA2/3 fields.

however later in the future certain combinations of vec2/3/4 will cause
DIFFERENT sub-operations.

for example CROSSPRODUCT, CORDIC with compkex numbers, also and especially the
mapreduce modes.

> Or, will it be split in two stages, so you first decode the prefix (if any),

yes

> then you take the result and use it to post-process the result of the scalar
> decoder?

exactly.  you can see i have started this process in ISACaller

https://git.libre-soc.org/?p=soc.git;a=blob;f=src/soc/decoder/isa/caller.py;h=7730ce198d8d70a4db02a80ab54c0450d678b6b2;hb=9f19947c9887e61f66247ee1ce82ae60bedaf3c6#l611

i could have used PowerDecoder2 to do that task, by adding a CSV file
(major1.csv) entry plus a NNN-Form plus some fields.

but, to be honest, when we get to multi-issue, PowerDecoder2 is total overkill,
it is better to have a separate vastly simpler SVP64 prefix identifier system.

we discussed that a few months back on the Compressed  bug and jacob came up
with a carry-propagation algorithm for multi-issue

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